May
30

what is DIJKSTRA’s algorithm ? EXPLAIN ?

vamsi | computer algorithms, data structures, digital logic, general

Djikstra’s algorithm (named after its discover, E.W. Dijkstra) solves the problem of finding the shortest path from a point in a graph (the source) to a destination. It turns out that one can find the shortest paths from a given source to all points in a graph in the same time, hence this problem is sometimes called the single-source shortest paths problem.

The somewhat unexpected result that all the paths can be found as easily as one further demonstrates the value of reading the literature on algorithms!

This problem is related to the spanning tree one. The graph representing all the paths from one vertex to all the others must be a spanning tree - it must include all vertices. There will also be no cycles as a cycle would define more than one path from the selected vertex to at least one other vertex. For a graph,

G = (V,E) where
  • V is a set of vertices and
  • E is a set of edges.

Dijkstra’s algorithm keeps two sets of vertices:

the set of vertices whose shortest paths from the source have already been determined and
V-S the remaining vertices.

The other data structures needed are:

d array of best estimates of shortest path to each vertex
pi an array of predecessors for each vertex

The basic mode of operation is:

  1. Initialise d and pi,
  2. Set S to empty,
  3. While there are still vertices in V-S,
    1. Sort the vertices in V-S according to the current best estimate of their distance from the source,
    2. Add u, the closest vertex in V-S, to S,
    3. Relax all the vertices still in V-S connected to u

Relaxation

The relaxation process updates the costs of all the vertices, v, connected to a vertex, u, if we could improve the best estimate of the shortest path to v by including (u,v) in the path to v.

The relaxation procedure proceeds as follows:

initialise_single_source( Graph g, Node s )
   for each vertex v in Vertices( g )
       g.d[v] := infinity
       g.pi[v] := nil
   g.d[s] := 0;

This sets up the graph so that each node has no predecessor (pi[v] = nil) and the estimates of the cost (distance) of each node from the source (d[v]) are infinite, except for the source node itself (d[s] = 0).

Note that we have also introduced a further way to store a graph (or part of a graph - as this structure can only store a spanning tree), the predecessor sub-graph - the list of predecessors of each node,

pi[j], 1 <= j <= |V|

The edges in the predecessor sub-graph are (pi[v],v).

The relaxation procedure checks whether the current best estimate of the shortest distance to v (d[v]) can be improved by going through u (i.e. by making u the predecessor of v):

A

relax( Node u, Node v, double w[][] )
    if d[v] > d[u] + w[u,v] then
       d[v] := d[u] + w[u,v]
       pi[v] := u

The algorithm itself is now:

shortest_paths( Graph g, Node s )
    initialise_single_source( g, s )
    S := { 0 }        /* Make S empty */
    Q := Vertices( g ) /* Put the vertices in a PQ */
    while not Empty(Q)
        u := ExtractCheapest( Q );
        AddNode( S, u ); /* Add u to S */
        for each vertex v in Adjacent( u )
            relax( u, v, w )

May
26

WHAT IS ROM (Read-only memory) ? WHAT ARE ITS TYPES ?

vamsi | computer organization, digital logic, general

Read-Only Memory or ROM is an integrated-circuit memory chip that contains configuration data. ROM is commonly called firmware because its programming is fully embedded into the ROM chip. As such, ROM is a hardware and software in one.

Because data is fully incorporated at the ROM chip’s manufacture, data stored can neither be erased nor replaced. This means permanent and secure data storage. However, if a mistake is made in manufacture, a ROM chip becomes unusable. The most expensive stage of ROM manufacture, therefore, is creating the template. If a template is readily available, duplicating the ROM chip is very easy and affordable.

A ROM chip is also non volatile so data stored in it is not lost when power is turned off.

rom

Masked ROM:

In this type of ROM bits are stored permanently by marking and metallization process. This is done by manufacturers. This type of ROM can be programmed only one-by the manufacture.

PROM:

Data are written into a ROM at the time of manufacture. However, a programmable ROM (PROM) allows the data to be loaded by the user, by connecting a fuse between the emitter and the bit-line. PROMs provide flexible and economical storage for fixed programs and data, where high production volumes are involved. Initially, if the PROM contains all 1s, then at the ‘required location the user can insert 0’s by burning out the fuses using high current pulses of course, this process is irreversible. However, the storing in ROMs will be very expensive when only a small number is required. Thus, PROMs provide a faster and less expensive approach for storing.

EPROM:

The Erasable PROM chip allows the stored data to erased and new data can be reprogrammed. It provides more flexibility during the development phase of digital system. With resemblance to the dynamic memory cell, information is stored in a capacitor is very well insulated and its rate of discharge is low. Hence it retains the stored information for more than a year. Due to high insulation, the process of writing new information into a cell involves the application of a higher voltage. The high voltage is used to cause a temporary breakdown in insulation, and allow charge to be stored in the capacitor. The contents of EPROM cells can be erased by increasing the discharge rate of the storage capacitors. This can be accomplished by exposing the chip to ultraviolet light. All cells in the chip are erased at the same time.

EEPROM:

In an electricity erasable PROM, the contents of cells can be erased by the application of a high voltage. Advantages with EEPROMs are : it need not be physically removed for reprogramming and the process can be made selective since electrical erasure is used.

The advantages of ROM are:

  • They are non-volatile
  • They are cheaper than RAM
  • They are static and do not refreshing
  • They are more reliable than RAM as their circuit is simple.
  • They are available in longer sizes than RAM.
  • They are easier to interface than RAM.

Nov
26

COMPUTER SCIENTIST (samson abramsky) ?

vamsi | general

Professor Samson Abramsky FRS is a computer scientist. Since the Year 2000, he has been a Fellow of the Royal Society of Edinburgh, a Fellow of Wolfson , Oxford and Christopher Strachey Professor of Computing at Oxford University Computing Laboratory. He has also been a Fellow of the Royal Society since 2004. His research achievements include the development of game semantics, domain theory in logical form, and categorical quantum mechanics.

He was educated at King’s College, Cambridge (BA 1975, MA Philosophy 1979, Diploma in Computer Science) and Queen Mary, University of London (PhD Computer Science 1988, supervised by Richard Bornat).

photo

His earlier positions include:

  • Programmer, GEC Computers Limited, 1976–1978
  • Lecturer, Department of Computer Science and Statistics, QMUL, 1980–1983
  • Lecturer, 1983–1988, Reader, 1988–1990, Professor, 1990–1995, Department of Computing,  Imperial College London
  • Professor of Theoretical Computer Science, University of Edinburgh, 1996–2000

Research career

Samson Abramsky is Christopher Strachey Professor of Computing and a Fellow of Wolfson College, Oxford University. Previously he held chairs at the Imperial College of Science, Technology and Medicine, and at the University of Edinburgh.

He holds MA degrees from Cambridge and Oxford, and a PhD from the University of London.

He is a Fellow of the Royal Society (2004), a Fellow of the Royal Society of Edinburgh (2000), and a Member of Academia Europaea (1993). He is a member of the Editorial Boards of the North Holland Studies in Logic and the Foundations of Mathematics, and of the Cambridge Tracts in Theoretical Computer Science. He was General Chair of LiCS 2000-2003, and is currently a member of the LiCS Organizing Committee.

He has played a leading role in the development of game semantics, and its applications to the semantics of programming languages. Other notable contributions include his work on domain theory in logical form, the lazy lambda calculus, strictness analysis, concurrency theory, interaction categories, and geometry of interaction. He has recently been working on high-level methods for quantum computation and information.

Awards

  • He was awarded an EPSRC Senior Research Fellowship in 2007
  • His paper “Domain theory in Logical Form won the LiCS Test-of-Time award (a 20-year retrospective) for 1987. The award was presented at LiCS 2007.
  • He was awarded an EPSRC Senior Research Fellowship on Foundational Structures and Methods for Quantum Informatics in 2007.
  • Fellow of the Royal Society (2004)
  • Fellow of the Royal Society of Edinburgh (2000)

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